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https://git.in.rschanz.org/ryan77627/guix.git
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63 lines
2 KiB
Diff
63 lines
2 KiB
Diff
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From 20009bdaf95d10bf748fa69b104672d3cfaceddf Mon Sep 17 00:00:00 2001
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From: Gerd Hoffmann <kraxel@redhat.com>
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Date: Fri, 7 Oct 2016 10:15:29 +0200
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Subject: [PATCH] xhci: limit the number of link trbs we are willing to process
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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---
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hw/usb/hcd-xhci.c | 10 ++++++++++
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1 file changed, 10 insertions(+)
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diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
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index 726435c..ee4fa48 100644
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--- a/hw/usb/hcd-xhci.c
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+++ b/hw/usb/hcd-xhci.c
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@@ -54,6 +54,8 @@
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* to the specs when it gets them */
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#define ER_FULL_HACK
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+#define TRB_LINK_LIMIT 4
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+
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#define LEN_CAP 0x40
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#define LEN_OPER (0x400 + 0x10 * MAXPORTS)
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#define LEN_RUNTIME ((MAXINTRS + 1) * 0x20)
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@@ -1000,6 +1002,7 @@ static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb,
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dma_addr_t *addr)
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{
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PCIDevice *pci_dev = PCI_DEVICE(xhci);
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+ uint32_t link_cnt = 0;
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while (1) {
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TRBType type;
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@@ -1026,6 +1029,9 @@ static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb,
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ring->dequeue += TRB_SIZE;
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return type;
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} else {
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+ if (++link_cnt > TRB_LINK_LIMIT) {
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+ return 0;
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+ }
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ring->dequeue = xhci_mask64(trb->parameter);
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if (trb->control & TRB_LK_TC) {
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ring->ccs = !ring->ccs;
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@@ -1043,6 +1049,7 @@ static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring)
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bool ccs = ring->ccs;
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/* hack to bundle together the two/three TDs that make a setup transfer */
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bool control_td_set = 0;
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+ uint32_t link_cnt = 0;
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while (1) {
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TRBType type;
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@@ -1058,6 +1065,9 @@ static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring)
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type = TRB_TYPE(trb);
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if (type == TR_LINK) {
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+ if (++link_cnt > TRB_LINK_LIMIT) {
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+ return -length;
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+ }
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dequeue = xhci_mask64(trb.parameter);
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if (trb.control & TRB_LK_TC) {
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ccs = !ccs;
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--
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1.8.3.1
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