guix/gnu/packages/patches/guile-arm-fixes.patch

Apply fixes for ARM to Guile.

From df8c52e93dfa3965e4714275f4b8cea2c8e0170b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ludovic=20Court=C3=A8s?= <ludo@gnu.org>
Date: Fri, 4 Jul 2014 15:35:06 +0200
Subject: [PATCH] Recognize arm-* target triplets.

Reported by Sylvain Beucler <beuc@beuc.net>.

* module/system/base/target.scm (cpu-endianness): Add case where CPU is
  "arm".
* test-suite/tests/asm-to-bytecode.test ("cross-compilation")["arm-unknown-linux-androideabi"]:
  New test.
---
 module/system/base/target.scm         | 4 +++-
 test-suite/tests/asm-to-bytecode.test | 5 ++++-
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/module/system/base/target.scm b/module/system/base/target.scm
index c74ae67..cefa951 100644
--- a/module/system/base/target.scm
+++ b/module/system/base/target.scm
@@ -1,6 +1,6 @@
 ;;; Compilation targets
 
-;; Copyright (C) 2011, 2012, 2013 Free Software Foundation, Inc.
+;; Copyright (C) 2011, 2012, 2013, 2014 Free Software Foundation, Inc.
 
 ;; This library is free software; you can redistribute it and/or
 ;; modify it under the terms of the GNU Lesser General Public
@@ -72,6 +72,8 @@
              (endianness big))
             ((string-match "^arm.*el" cpu)
              (endianness little))
+            ((string=? "arm" cpu)                ;ARMs are LE by default
+             (endianness little))
             (else
              (error "unknown CPU endianness" cpu)))))
 
diff --git a/test-suite/tests/asm-to-bytecode.test b/test-suite/tests/asm-to-bytecode.test
index 6d2f20e..62ea0ed 100644
--- a/test-suite/tests/asm-to-bytecode.test
+++ b/test-suite/tests/asm-to-bytecode.test
@@ -1,6 +1,6 @@
 ;;;; Assembly to bytecode compilation -*- mode: scheme; coding: utf-8; -*-
 ;;;;
-;;;; 	Copyright (C) 2010, 2011, 2012, 2013 Free Software Foundation, Inc.
+;;;; 	Copyright (C) 2010, 2011, 2012, 2013, 2014 Free Software Foundation, Inc.
 ;;;;
 ;;;; This library is free software; you can redistribute it and/or
 ;;;; modify it under the terms of the GNU Lesser General Public
@@ -205,6 +205,9 @@
   (test-target "x86_64-unknown-linux-gnux32"      ; x32 ABI (Debian tuplet)
                (endianness little) 4)
 
+  (test-target "arm-unknown-linux-androideabi"
+               (endianness little) 4)
+
   (pass-if-exception "unknown target"
     exception:miscellaneous-error
     (call-with-values (lambda ()
-- 
2.1.2

From ffd3e55cfd12a3559621e3130d613d319243512d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ludovic=20Court=C3=A8s?= <ludo@gnu.org>
Date: Fri, 4 Jul 2014 17:26:41 +0200
Subject: [PATCH] Recognize more ARM targets.

Suggested by Dale P. Smith.

* module/system/base/target.scm (cpu-endianness): Add cases for
  "arm.*eb", "^aarch64.*be", and "aarch64".  Change "arm" case to
  "arm.*".
  (triplet-pointer-size): Allow underscore as in 'aarch64_be'.
* test-suite/tests/asm-to-bytecode.test ("cross-compilation")["armeb-unknown-linux-gnu",
  "aarch64-linux-gnu", "aarch64_be-linux-gnu"]: New tests.
---
 module/system/base/target.scm         | 10 ++++++++--
 test-suite/tests/asm-to-bytecode.test |  6 ++++++
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/module/system/base/target.scm b/module/system/base/target.scm
index cefa951..31e3fea 100644
--- a/module/system/base/target.scm
+++ b/module/system/base/target.scm
@@ -72,7 +72,13 @@
              (endianness big))
             ((string-match "^arm.*el" cpu)
              (endianness little))
-            ((string=? "arm" cpu)                ;ARMs are LE by default
+            ((string-match "^arm.*eb" cpu)
+             (endianness big))
+            ((string-prefix? "arm" cpu)          ;ARMs are LE by default
+             (endianness little))
+            ((string-match "^aarch64.*be" cpu)
+             (endianness big))
+            ((string=? "aarch64" cpu)
              (endianness little))
             (else
              (error "unknown CPU endianness" cpu)))))
@@ -97,7 +103,7 @@
           ((string-match "^x86_64-.*-gnux32" triplet) 4)  ; x32
 
           ((string-match "64$" cpu) 8)
-          ((string-match "64[lbe][lbe]$" cpu) 8)
+          ((string-match "64_?[lbe][lbe]$" cpu) 8)
           ((member cpu '("sparc" "powerpc" "mips" "mipsel")) 4)
           ((string-match "^arm.*" cpu) 4)
           (else (error "unknown CPU word size" cpu)))))
diff --git a/test-suite/tests/asm-to-bytecode.test b/test-suite/tests/asm-to-bytecode.test
index 62ea0ed..8aeba84 100644
--- a/test-suite/tests/asm-to-bytecode.test
+++ b/test-suite/tests/asm-to-bytecode.test
@@ -207,6 +207,12 @@
 
   (test-target "arm-unknown-linux-androideabi"
                (endianness little) 4)
+  (test-target "armeb-unknown-linux-gnu"
+               (endianness big) 4)
+  (test-target "aarch64-linux-gnu"
+               (endianness little) 8)
+  (test-target "aarch64_be-linux-gnu"
+               (endianness big) 8)
 
   (pass-if-exception "unknown target"
     exception:miscellaneous-error
-- 
2.1.2

From a85c78ea1393985fdb6e6678dea19135c553d341 Mon Sep 17 00:00:00 2001
From: Mark H Weaver <mhw@netris.org>
Date: Fri, 19 Sep 2014 21:18:09 -0400
Subject: [PATCH] VM: ASM_MUL for ARM: Add earlyclobber constraint to the SMULL
 outputs.

Reported by Rob Browning <rlb@defaultvalue.org>.

* libguile/vm-i-scheme.c (ASM_MUL)[ARM]: Add earlyclobber (&) constraint
  to the SMULL output registers.
---
 libguile/vm-i-scheme.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/libguile/vm-i-scheme.c b/libguile/vm-i-scheme.c
index 587aa95..162efab 100644
--- a/libguile/vm-i-scheme.c
+++ b/libguile/vm-i-scheme.c
@@ -1,5 +1,4 @@
-/* Copyright (C) 2001, 2009, 2010, 2011, 2012, 2013,
- *   2014 Free Software Foundation, Inc.
+/* Copyright (C) 2001, 2009-2014 Free Software Foundation, Inc.
  * 
  * This library is free software; you can redistribute it and/or
  * modify it under the terms of the GNU Lesser General Public License
@@ -363,7 +362,7 @@ VM_DEFINE_FUNCTION (149, ge, "ge?", 2)
       {									\
 	scm_t_signed_bits rlo, rhi;					\
 	asm ("smull %0, %1, %2, %3\n"					\
-	     : "=r" (rlo), "=r" (rhi)					\
+	     : "=&r" (rlo), "=&r" (rhi)					\
 	     : "r" (SCM_UNPACK (x) - scm_tc2_int),			\
 	       "r" (SCM_I_INUM (y)));					\
 	if (SCM_LIKELY (SCM_SRS (rlo, 31) == rhi))			\
-- 
2.1.2

From bed025bd2569b1c033f24d7d9e660e39ebf65cac Mon Sep 17 00:00:00 2001
From: Mark H Weaver <mhw@netris.org>
Date: Sat, 20 Sep 2014 03:59:51 -0400
Subject: [PATCH] VM: Allow the C compiler to choose FP_REG on ARM.

Reported by Rob Browning <rlb@defaultvalue.org>.

* libguile/vm-engine.h (IP_REG)[__arm__]: Remove explicit register
  choice ("r7") for FP_REG, which was reported to cause compilation
  failures on ARM.
---
 libguile/vm-engine.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/libguile/vm-engine.h b/libguile/vm-engine.h
index 46d4cff..e618be7 100644
--- a/libguile/vm-engine.h
+++ b/libguile/vm-engine.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 2001, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
+/* Copyright (C) 2001, 2009-2012, 2014 Free Software Foundation, Inc.
  * 
  * This library is free software; you can redistribute it and/or
  * modify it under the terms of the GNU Lesser General Public License
@@ -81,7 +81,7 @@
 #ifdef __arm__
 #define IP_REG asm("r9")
 #define SP_REG asm("r8")
-#define FP_REG asm("r7")
+#define FP_REG
 #endif
 #endif
 
-- 
2.1.2