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gnu: Add fftgen.
* gnu/packages/fpga.scm (fftgen): New variable. Signed-off-by: Ludovic Courtès <ludo@gnu.org>
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@ -552,3 +552,35 @@ (define-public verilator
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performs the design simulation. Verilator also supports linking its generated
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libraries, optionally encrypted, into other simulators.")
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(license license:lgpl3)))
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(define-public fftgen
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(let ((commit "1d75a992efd0528edea128a903aafdabe133cb08") ;no releases
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(revision "0"))
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(package
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(name "fftgen")
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(version (git-version "0" revision commit))
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(source (origin
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(method git-fetch)
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(uri (git-reference
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(url "https://github.com/ZipCPU/dblclockfft")
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(commit commit)))
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(file-name (git-file-name name version))
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(sha256
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(base32
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"0qq874yalzpjdwnxhc5df8a0ifywv29wcncb09945x56xplvkcmd"))))
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(build-system gnu-build-system)
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(arguments
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`(#:tests? #f ;no tests
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#:make-flags '("CFLAGS=-g -O2") ;default flags lack -O2
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#:phases (modify-phases %standard-phases
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(delete 'configure)
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(replace 'install
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(lambda* (#:key outputs #:allow-other-keys)
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(let ((bin (string-append (assoc-ref outputs "out")
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"/bin")))
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(install-file "sw/fftgen" bin)))))))
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(synopsis "Generic pipelined FFT core generator")
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(description "fftgen produces @acronym{FFT, fast-Fourier transforms}
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hardware designs in Verilog.")
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(home-page "https://zipcpu.com/")
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(license license:lgpl3+))))
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