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gnu: yosys: Update source and home-page URLs.

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* gnu/packages/fpga.scm (yosys)[source]: Update source-repository URL.
[home-page]: Update URL.

Signed-off-by: Christopher Baines <mail@cbaines.net>
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Simon South 2023-01-08 13:31:27 -05:00 committed by Christopher Baines
parent 3729172728
commit 535c61ccc3
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1 changed files with 2 additions and 2 deletions
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gnu/packages/fpga.scm
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@ -141,7 +141,7 @@ (define-public yosys
(source (origin (source (origin
(method git-fetch) (method git-fetch)
(uri (git-reference (uri (git-reference
(url "https://github.com/cliffordwolf/yosys") (url "https://github.com/YosysHQ/yosys")
(commit (string-append "yosys-" version)) (commit (string-append "yosys-" version))
(recursive? #t))) ; for the ‘iverilog’ submodule (recursive? #t))) ; for the ‘iverilog’ submodule
(sha256 (sha256
@ -223,7 +223,7 @@ (define-public yosys
abc)) abc))
(propagated-inputs (propagated-inputs
(list z3)) ; should be in path for yosys-smtbmc (list z3)) ; should be in path for yosys-smtbmc
(home-page "http://www.clifford.at/yosys/") (home-page "https://yosyshq.net/yosys/")
(synopsis "FPGA Verilog RTL synthesizer") (synopsis "FPGA Verilog RTL synthesizer")
(description "Yosys synthesizes Verilog-2005.") (description "Yosys synthesizes Verilog-2005.")
(license license:isc))) (license license:isc)))