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* gnu/packages/patches/qemu-CVE-2015-4037.patch, gnu/packages/patches/qemu-CVE-2015-4103.patch, gnu/packages/patches/qemu-CVE-2015-4104.patch, gnu/packages/patches/qemu-CVE-2015-4105.patch, gnu/packages/patches/qemu-CVE-2015-4106-pt1.patch, gnu/packages/patches/qemu-CVE-2015-4106-pt2.patch, gnu/packages/patches/qemu-CVE-2015-4106-pt3.patch, gnu/packages/patches/qemu-CVE-2015-4106-pt4.patch, gnu/packages/patches/qemu-CVE-2015-4106-pt5.patch, gnu/packages/patches/qemu-CVE-2015-4106-pt6.patch, gnu/packages/patches/qemu-CVE-2015-4106-pt7.patch, gnu/packages/patches/qemu-CVE-2015-4106-pt8.patch: New files. * gnu-system.am (dist_patch_DATA): Add them. * gnu/packages/qemu.scm (qemu-headless)[source]: Add patches.
135 lines
5.1 KiB
Diff
135 lines
5.1 KiB
Diff
From 5c83b2f5b4b956e91dd6e5711f14df7ab800aefb Mon Sep 17 00:00:00 2001
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From: Jan Beulich <jbeulich@suse.com>
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Date: Tue, 2 Jun 2015 15:07:00 +0000
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Subject: [PATCH] xen: properly gate host writes of modified PCI CFG contents
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The old logic didn't work as intended when an access spanned multiple
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fields (for example a 32-bit access to the location of the MSI Message
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Data field with the high 16 bits not being covered by any known field).
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Remove it and derive which fields not to write to from the accessed
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fields' emulation masks: When they're all ones, there's no point in
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doing any host write.
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This fixes a secondary issue at once: We obviously shouldn't make any
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host write attempt when already the host read failed.
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This is XSA-128.
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
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---
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hw/xen/xen_pt.c | 25 +++++++++++++++++++++----
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hw/xen/xen_pt.h | 2 --
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hw/xen/xen_pt_config_init.c | 4 ----
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3 files changed, 21 insertions(+), 10 deletions(-)
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diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
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index d095c08..8923582 100644
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--- a/hw/xen/xen_pt.c
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+++ b/hw/xen/xen_pt.c
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@@ -234,7 +234,7 @@ static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr,
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int index = 0;
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XenPTRegGroup *reg_grp_entry = NULL;
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int rc = 0;
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- uint32_t read_val = 0;
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+ uint32_t read_val = 0, wb_mask;
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int emul_len = 0;
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XenPTReg *reg_entry = NULL;
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uint32_t find_addr = addr;
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@@ -271,6 +271,9 @@ static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr,
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if (rc < 0) {
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XEN_PT_ERR(d, "pci_read_block failed. return value: %d.\n", rc);
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memset(&read_val, 0xff, len);
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+ wb_mask = 0;
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+ } else {
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+ wb_mask = 0xFFFFFFFF >> ((4 - len) << 3);
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}
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/* pass directly to the real device for passthrough type register group */
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@@ -298,6 +301,11 @@ static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr,
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valid_mask <<= (find_addr - real_offset) << 3;
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ptr_val = (uint8_t *)&val + (real_offset & 3);
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+ if (reg->emu_mask == (0xFFFFFFFF >> ((4 - reg->size) << 3))) {
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+ wb_mask &= ~((reg->emu_mask
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+ >> ((find_addr - real_offset) << 3))
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+ << ((len - emul_len) << 3));
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+ }
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/* do emulation based on register size */
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switch (reg->size) {
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@@ -350,10 +358,19 @@ static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr,
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memory_region_transaction_commit();
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out:
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- if (!(reg && reg->no_wb)) {
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+ for (index = 0; wb_mask; index += len) {
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/* unknown regs are passed through */
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- rc = xen_host_pci_set_block(&s->real_device, addr,
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- (uint8_t *)&val, len);
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+ while (!(wb_mask & 0xff)) {
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+ index++;
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+ wb_mask >>= 8;
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+ }
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+ len = 0;
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+ do {
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+ len++;
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+ wb_mask >>= 8;
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+ } while (wb_mask & 0xff);
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+ rc = xen_host_pci_set_block(&s->real_device, addr + index,
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+ (uint8_t *)&val + index, len);
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if (rc < 0) {
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XEN_PT_ERR(d, "pci_write_block failed. return value: %d.\n", rc);
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diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h
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index 942dc60..52ceb85 100644
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--- a/hw/xen/xen_pt.h
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+++ b/hw/xen/xen_pt.h
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@@ -105,8 +105,6 @@ struct XenPTRegInfo {
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uint32_t ro_mask;
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/* reg emulate field mask (ON:emu, OFF:passthrough) */
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uint32_t emu_mask;
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- /* no write back allowed */
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- uint32_t no_wb;
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xen_pt_conf_reg_init init;
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/* read/write function pointer
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* for double_word/word/byte size */
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diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c
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index 95a51db..dae0519 100644
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--- a/hw/xen/xen_pt_config_init.c
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+++ b/hw/xen/xen_pt_config_init.c
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@@ -1279,7 +1279,6 @@ static XenPTRegInfo xen_pt_emu_reg_msi[] = {
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.init_val = 0x00000000,
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.ro_mask = 0x00000003,
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.emu_mask = 0xFFFFFFFF,
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- .no_wb = 1,
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.init = xen_pt_common_reg_init,
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.u.dw.read = xen_pt_long_reg_read,
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.u.dw.write = xen_pt_msgaddr32_reg_write,
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@@ -1291,7 +1290,6 @@ static XenPTRegInfo xen_pt_emu_reg_msi[] = {
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.init_val = 0x00000000,
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.ro_mask = 0x00000000,
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.emu_mask = 0xFFFFFFFF,
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- .no_wb = 1,
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.init = xen_pt_msgaddr64_reg_init,
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.u.dw.read = xen_pt_long_reg_read,
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.u.dw.write = xen_pt_msgaddr64_reg_write,
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@@ -1303,7 +1301,6 @@ static XenPTRegInfo xen_pt_emu_reg_msi[] = {
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.init_val = 0x0000,
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.ro_mask = 0x0000,
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.emu_mask = 0xFFFF,
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- .no_wb = 1,
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.init = xen_pt_msgdata_reg_init,
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.u.w.read = xen_pt_word_reg_read,
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.u.w.write = xen_pt_msgdata_reg_write,
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@@ -1315,7 +1312,6 @@ static XenPTRegInfo xen_pt_emu_reg_msi[] = {
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.init_val = 0x0000,
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.ro_mask = 0x0000,
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.emu_mask = 0xFFFF,
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- .no_wb = 1,
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.init = xen_pt_msgdata_reg_init,
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.u.w.read = xen_pt_word_reg_read,
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.u.w.write = xen_pt_msgdata_reg_write,
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--
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2.2.1
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